The present invention relates to semiconductor devices and device fabrication and, more specifically, to device structures, fabrication methods, and design structures for metal-oxide-semiconductor field-effect transistors.
An integrated circuit (IC) is susceptible to damage from fast, transient, and high-voltage electrostatic discharge (ESD) events. Among the sources of IC exposure to ESD events are the human body described by the Human Body Model, metallic objects described by the Machine Model, and the IC itself should the IC charge and discharge to ground as described by the Charged Device Model. A common scheme to protect an input/output (I/O) pad uses a metal-oxide-semiconductor field-effect transistor (MOSFET) with a drain connected to the I/O pad and a source tied to ground. During an ESD event, the MOSFET supplies a low impedance current path to ground and diverts the ESD current away from the IC coupled with the I/O pad.
Device structures, fabrication methods, and design structures are needed for a MOSFET to provide protection from the detrimental effects of an ESD event.